Sierra Wireless AirLink FXT Series Dokumentacja Pobierz pdf (Strona 25)

WA_DEV_FEX20_PTS_004 Rev 001 June 30, 2010 25

Expansion Card Product Technical

Specification

Interfaces

Table 14: SPI2 Bus Pin Description

Number

Signal

I/O

I/O Type

Reset State

Description

Multiplexed

With

SPI2-CLK

2V8

SPI Serial Clock

GPIO32

SPI2-IO

I/O

2V8

SPI Serial input/output

GPIO33

SP2-I

2V8

SPI Serial input

GPIO34

~SPI2-CS

2V8

SPI Enable

GPIO35

Refer to section 4.2 Electrical Information for Digital I/O for open drain, 2V8 and 1V8 voltage

characteristics and reset state definitions.

4.4.1.4. Waveforms

The figure below shows the waveforms for SPI transfers with a 4-wire configuration in master mode 0

(chip select is not represented).

Figure 5. SPI Timing Diagram (Mode 0, Master, 4 wires)

Table 15: SPI Bus AC Characteristics

Signal

Description

Minimum

Typical

Maximum

Unit

CLK-cycle

SPI clock frequency

0.1015

MHz

Data-OUT delay

Data-OUT ready delay time

Data-IN-setup

Data-IN setup time

Data-OUT-hold

Data-OUT hold time

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 ... 59 60

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